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A 3-Step Cartesian Genetic Programming for Designing Combinational Logic Circuits with Multiplexers

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Progress in Artificial Intelligence (EPIA 2019)

Part of the book series: Lecture Notes in Computer Science ((LNAI,volume 11804))

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Abstract

The design of digital circuits has been widely investigated in the literature but the evolution of complex combinational logic circuits is not an easy task for Cartesian Genetic Programming (CGP). We propose here a new approach in order to increase the capacity of CGP in finding feasible circuits (those with the same response of the truth table). The proposed procedure uses a 3-step evolution by coupling a 2-input multiplexer in each circuit’s output. These multiplexers divide the truth table and the similarity between its inputs is maximized. Thus, don’t-care situations are generated for the controls of the multiplexers, making the evolution of CGP easier. Also, a variant of the standard evolutionary strategy commonly adopted in CGP is proposed, where the following procedures are considered: (i) the Single Active Mutation (SAM), (ii) the Guided Active Mutation (GAM), and (iii) a crossover. The proposed methods are applied to combinational logic circuits with multiple outputs and the results obtained are compared to those found by a standard CGP with SAM. Benchmark problems with inputs from 9 to 12 are used in the computational experiments, and the objective is to find circuits that match the truth tables. The results show that (i) the combination of crossover, SAM, and GAM increases the performance of CGP, and (ii) the proposed 3-step method is the only technique tested here able to obtain feasible solutions in all independent runs.

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Notes

  1. 1.

    https://ddd.fit.cvut.cz/prj/Benchmarks/LGSynth91.pdf.

  2. 2.

    https://github.com/ciml/ciml-lib.

References

  1. Coello, C., Aguirre, A., Buckles, B.: Evolutionary multiobjective design of combinational logic circuits. In: Proceedings of the 2nd NASA/DoD Workshop on Evolvable Hardware, pp. 161–170. IEEE (2000)

    Google Scholar 

  2. Coello, C.A.C., Aguirre, A.H.: Design of combinational logic circuits through an evolutionary multiobjective optimization approach. AI EDAM 16(1), 39–53 (2002)

    Google Scholar 

  3. Coello, C.A.C., Alba, E., Luque, G.: Comparing different serial and parallel heuristics to design combinational logic circuits. In: Proceedings of the NASA/DoD Conference on Evolvable Hardware, pp. 3–12 (2003)

    Google Scholar 

  4. Coello Coello, C.A., Luna, E.H., Aguirre, A.H.: Use of particle swarm optimization to design combinational logic circuits. In: Tyrrell, A.A.M., Haddow, P.C., Torresen, J. (eds.) ICES 2003. LNCS, vol. 2606, pp. 398–409. Springer, Heidelberg (2003). https://doi.org/10.1007/3-540-36553-2_36

    Chapter  MATH  Google Scholar 

  5. Coello Coello, C.A., Zavala, R.L.G., García, B.M., Aguirre, A.H.: Ant colony system for the design of combinational logic circuits. In: Miller, J., Thompson, A., Thomson, P., Fogarty, T.C. (eds.) ICES 2000. LNCS, vol. 1801, pp. 21–30. Springer, Heidelberg (2000). https://doi.org/10.1007/3-540-46406-9_3

    Chapter  Google Scholar 

  6. García, B.M., Coello, C.A.C.: An approach based on the use of the ant system to design combinational logic circuits. Mathware Soft Comput. 9(2–3), 235–250 (2002)

    MathSciNet  MATH  Google Scholar 

  7. Goldman, B.W., Punch, W.F.: Reducing wasted evaluations in cartesian genetic programming. In: Krawiec, K., Moraglio, A., Hu, T., Etaner-Uyar, A.Ş., Hu, B. (eds.) EuroGP 2013. LNCS, vol. 7831, pp. 61–72. Springer, Heidelberg (2013). https://doi.org/10.1007/978-3-642-37207-0_6

    Chapter  Google Scholar 

  8. Goldman, B.W., Punch, W.F.: Analysis of cartesian genetic programming’s evolutionary mechanisms. IEEE Trans. Evol. Comput. 19(3), 359–373 (2015)

    Article  Google Scholar 

  9. Husa, J., Kalkreuth, R.: A comparative study on crossover in cartesian genetic programming. In: Castelli, M., Sekanina, L., Zhang, M., Cagnoni, S., García-Sánchez, P. (eds.) EuroGP 2018. LNCS, vol. 10781, pp. 203–219. Springer, Cham (2018). https://doi.org/10.1007/978-3-319-77553-1_13

    Chapter  Google Scholar 

  10. Kalkreuth, R., Rudolph, G., Droschinsky, A.: A new subgraph crossover for cartesian genetic programming. In: McDermott, J., Castelli, M., Sekanina, L., Haasdijk, E., García-Sánchez, P. (eds.) EuroGP 2017. LNCS, vol. 10196, pp. 294–310. Springer, Cham (2017). https://doi.org/10.1007/978-3-319-55696-3_19

    Chapter  Google Scholar 

  11. Manfrini, F., Barbosa, H.J., Bernardino, H.S.: Optimization of combinational logic circuits through decomposition of truth table and evolution of sub-circuits. In: 2014 IEEE Congress on Evolutionary Computation (CEC), pp. 945–950. IEEE (2014)

    Google Scholar 

  12. Miller, J.F.: Cartesian genetic programming. In: Miller, J. (ed.) Cartesian Genetic Programming. NCS, pp. 17–34. Springer, Heidelberg (2011)

    Chapter  Google Scholar 

  13. Miller, J.F.: An empirical study of the efficiency of learning boolean functions using a cartesian genetic programming approach. In: Proceedings of the Conference on Genetic and Evolutionary Computation, pp. 1135–1142. Morgan Kaufmann, Burlington (1999)

    Google Scholar 

  14. Miller, J.F., Job, D., Vassilev, V.K.: Principles in the evolutionary design of digital circuits - part i. Genet. Program. Evolvable Mach. 1(1–2), 7–35 (2000)

    Article  Google Scholar 

  15. Miller, J.F., Smith, S.L.: Redundancy and computational efficiency in cartesian genetic programming. IEEE Trans. Evol. Comput. 10(2), 167–174 (2006)

    Article  Google Scholar 

  16. da Silva, J.E.H., Bernardino, H.S.: Cartesian genetic programming with crossover for designing combinational logic circuits. In: Proceedings of the Brazilian Conference on Intelligent Systems (BRACIS), pp. 145–150. IEEE (2018)

    Google Scholar 

  17. da Silva, J.E.H., Manfrini, F.A.L., Bernardino, H.S., Barbosa, H.J.C.: Biased mutation and tournament selection approaches for designing combinational logic circuits via cartesian genetic programming. Anais do Encontro Nacional de Inteligência Artificial e Computacional (ENIAC), pp. 835–846 (2018)

    Google Scholar 

  18. da Silva, J.E.H., de Souza, L.A.M., Bernardino, H.S.: A guided active mutation for designing combinational logic circuits via cartesian genetic programming. In: Proceedings of the International Conference on Machine Learning, Optimization, and Data Science (LOD), pp. 1–12. Springer (2019)

    Google Scholar 

  19. Stepney, S., Adamatzky, A. (eds.): Inspired by Nature. ECC, vol. 28. Springer, Cham (2018). https://doi.org/10.1007/978-3-319-67997-6

    Book  Google Scholar 

  20. Vasicek, Z.: Cartesian GP in optimization of combinational circuits with hundreds of inputs and thousands of gates. In: Machado, P., et al. (eds.) EuroGP 2015. LNCS, vol. 9025, pp. 139–150. Springer, Cham (2015). https://doi.org/10.1007/978-3-319-16501-1_12

    Chapter  Google Scholar 

  21. Vasicek, Z.: Bridging the gap between evolvable hardware and industry using cartesian genetic programming. In: Stepney, S., Adamatzky, A. (eds.) Inspired by Nature. ECC, vol. 28, pp. 39–55. Springer, Cham (2018). https://doi.org/10.1007/978-3-319-67997-6_2

    Chapter  Google Scholar 

  22. Vasicek, Z., Sekanina, L.: How to evolve complex combinational circuits from scratch? In: International Conference on Evolvable Systems (ICES), pp. 133–140. IEEE (2014)

    Google Scholar 

  23. Walker, J.A., Miller, J.F., Cavill, R.: A multi-chromosome approach to standard and embedded cartesian genetic programming. In: Proceedings of the 8th Annual Conference on Genetic and Evolutionary Computation, pp. 903–910. ACM (2006)

    Google Scholar 

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Acknowledgments

We thanks the support provided by CNPq (grant 312682/2018-2), FAPEMIG (grant APQ-00337-18), Capes, PPGCC/UFJF, PPGMC/UFJF.

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Correspondence to Heder Soares Bernardino .

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Henriques da Silva, J.E., Soares Bernardino, H. (2019). A 3-Step Cartesian Genetic Programming for Designing Combinational Logic Circuits with Multiplexers. In: Moura Oliveira, P., Novais, P., Reis, L. (eds) Progress in Artificial Intelligence. EPIA 2019. Lecture Notes in Computer Science(), vol 11804. Springer, Cham. https://doi.org/10.1007/978-3-030-30241-2_63

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  • DOI: https://doi.org/10.1007/978-3-030-30241-2_63

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