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Parallel Grammatical Evolution for Circuit Optimization

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Book cover Evolvable Systems: From Biology to Hardware (ICES 2008)

Part of the book series: Lecture Notes in Computer Science ((LNTCS,volume 5216))

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Abstract

This paper describes application of Parallel Grammatical Evolution (PGE) algorithm to combinatorial logic circuit generation. The grammar and algorithms used are described. To increase the efficiency of Grammatical Evolution (GE) the backward processing algorithm was used. Different approaches to create multiobjective fitness functions are described and tested. Specifically the fitness functions are defined as set of rules incorporating different comparison methods in each stage of the computation. The algorithm is internally parallel and consists of three different interconnected populations.

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References

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© 2008 Springer-Verlag Berlin Heidelberg

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Popelka, O., Osmera, P. (2008). Parallel Grammatical Evolution for Circuit Optimization. In: Hornby, G.S., Sekanina, L., Haddow, P.C. (eds) Evolvable Systems: From Biology to Hardware. ICES 2008. Lecture Notes in Computer Science, vol 5216. Springer, Berlin, Heidelberg. https://doi.org/10.1007/978-3-540-85857-7_40

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  • DOI: https://doi.org/10.1007/978-3-540-85857-7_40

  • Publisher Name: Springer, Berlin, Heidelberg

  • Print ISBN: 978-3-540-85856-0

  • Online ISBN: 978-3-540-85857-7

  • eBook Packages: Computer ScienceComputer Science (R0)

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