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Introducing Flexibility in Digital Circuit Evolution: Exploiting Undefined Values in Binary Truth Tables

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Evolvable Systems: From Biology to Hardware (ICES 2010)

Part of the book series: Lecture Notes in Computer Science ((LNTCS,volume 6274))

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Abstract

Evolutionary algorithms can be used to evolve novel digital circuit solutions. This paper proposes the use of flexible target truth tables, allowing evolution more freedom where values are undefined. This concept is applied to three test circuits with different distributions of “don’t care” values. Two strategies are introduced for utilising the undefined output values within the evolutionary algorithm. The use of flexible desired truth tables is shown to significantly improve the success of the algorithm in evolving circuits to perform this function. In addition, we show that this flexibility allows evolution to develop more hardware efficient solutions than using a fully-defined truth table.

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References

  1. Miller, J.F., Job, D., Vassilev, V.K.: Principles in the Evolutionary Design of Digital Circuits - Part I. Journal of Genetic Programming and Evolvable Machines 1, 8–35 (2000)

    MATH  Google Scholar 

  2. Perez, E.I., Coello, C.C.: Extracting and re-using design patterns from genetic algorithms using case-based reasoning. Engineering Optimization 35(2), 121–141 (2003)

    Article  Google Scholar 

  3. Miller, J.F., Thomson, P., Fogarty, T.: Designing Electronic Circuits Using Evolutionary Algorithms. In: Quagliarella, D., Periaux, J., Poloni, C., Winter, G. (eds.) Arithmetic Circuits: A Case Study, Genetic Algorithms and Evolution Strategies in Engineering and Computer Science, pp. 105–131. Wiley, Chichester (1997)

    Google Scholar 

  4. Miller, J.F., Thomson, P.: Cartesian Genetic Programming. In: Poli, R., Banzhaf, W., Langdon, W.B., Miller, J., Nordin, P., Fogarty, T.C. (eds.) EuroGP 2000. LNCS, vol. 1802, pp. 121–132. Springer, Heidelberg (2000)

    Chapter  Google Scholar 

  5. Perkowski, M., Foote, D., Chen, Q., Al-Rabadi, A., Jozwiak, L.: Learning hardware using multiple-valued logic-Part 1: introduction and approach. IEEE Mirco 22(3), 41–51 (2002)

    Google Scholar 

  6. Poli, R.: Sub-machine-code GP: New results and extensions. In: Langdon, W.B., Fogarty, T.C., Nordin, P., Poli, R. (eds.) EuroGP 1999. LNCS, vol. 1598, pp. 65–82. Springer, Heidelberg (1999)

    Chapter  Google Scholar 

  7. Bäck, T., Hoffmeister, F., Schwefel, H.P.: A survey of evolution strategies. In: Belew, R., Booker, L. (eds.) Proceedings of the 4th International Conference on Genetic Algorithms, pp. 2–9. Morgan Kaufmann, San Francisco (1991)

    Google Scholar 

  8. Miller, J.F., Smith, S.L.: Redundancy and Computational Efficiency in Cartesian Genetic Programming. IEEE Trans. on Evolutionary Computation 10, 167–174 (2006)

    Article  Google Scholar 

  9. Shaw, R.F.: Arithmetic Operations in a Binary Computer. The Review of Scientific Instruments 21(8) (1950)

    Google Scholar 

  10. Oberman, S.F.: Floating Point Division and Square Root Algorithms and Implementation in the AMD-K7 Microprocessor. In: Proc. IEEE Symposium on Computer Arithmetic, pp. 106–115 (1999)

    Google Scholar 

  11. Yang, S.: Logic synthesis and optimisation benchmark user guide version 3. MCNC (1991)

    Google Scholar 

  12. Koza, J.R.: Genetic Programming: On the Programming of Computers by Means of Natural Selection. MIT Press, Cambridge (1992)

    MATH  Google Scholar 

  13. Holder, M.E.: A modified Karnaugh map technique. IEEE Transactions on Education 48(1), 206–207 (2005)

    Article  Google Scholar 

  14. Sekanina, L.: Evolutionary Design of Digital Circuits: Where Are Current Limits? In: Proceedings of the First NASA/ESA Conference on Adaptive Hardware and Systems (AHS 2006), pp. 171–178. IEEE CS, Los Alamitos (2006)

    Chapter  Google Scholar 

  15. Stomeo, E., Kalganova, T., Lambert, C.: Generalized Disjunction Decomposition for Evolvable Hardware. IEEE Trans. Syst., Man, and Cyb. Part B 36(5), 1024–1043 (2006)

    Article  Google Scholar 

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Ledwith, R.D., Miller, J.F. (2010). Introducing Flexibility in Digital Circuit Evolution: Exploiting Undefined Values in Binary Truth Tables. In: Tempesti, G., Tyrrell, A.M., Miller, J.F. (eds) Evolvable Systems: From Biology to Hardware. ICES 2010. Lecture Notes in Computer Science, vol 6274. Springer, Berlin, Heidelberg. https://doi.org/10.1007/978-3-642-15323-5_3

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  • DOI: https://doi.org/10.1007/978-3-642-15323-5_3

  • Publisher Name: Springer, Berlin, Heidelberg

  • Print ISBN: 978-3-642-15322-8

  • Online ISBN: 978-3-642-15323-5

  • eBook Packages: Computer ScienceComputer Science (R0)

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