Automated analog circuit design using two-layer genetic programming

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Abstract

Analog circuits are very important in many high-speed applications such as communications. Since the size of analog circuit is becoming larger and more complex, the design is becoming more and more difficult. This paper proposes a two-layer evolutionary scheme based on genetic programming (GP), which uses a divide-and-conquer approach to evolve the analog circuits. Corresponding to the two-layer GP, a new representation of circuit has been proposed here and it is more helpful to generate expectant circuit graphs. This algorithm can evolve the circuits with dynamical size, circuit topology, and component values. The experimental results on the designs of the voltage amplifier and the low-pass filter show that this algorithm is efficient.

Introduction

Analog circuits play an important role in electronic systems. Circuit design is of considerable practical importance because all electrical circuits are ultimately analog circuits. Although the activity of the digital circuit design far outpaces that of the analog circuit design, analog modules are still indispensable in many digital circuits. Moreover, a layer of analog circuitry provides an interface between most digital circuits and the rest of the world. Further, all commonly used analog circuits must be redesigned with the introduction of each new generation of solid-state process technology.

It was recently estimated that approximately 60% of CMOS-based application-specific integrated circuit (ASIC) includes analog circuits [1]. The design process for analog circuits begins with a high layer description of the circuit’s desired behavior. Both the topology and the sizing of the circuit must be chosen such that the resulting circuit satisfies the design objectives. The topology comprises the gross number of components in the circuit, the type of each component (e.g., a resistor), and a list of all connections between components. The sizing entails specifying the values (often numerical) of each component in the circuit.

The techniques for automating analog circuit design appeared about 20 years ago. These methods include heuristics [2], knowledge-bases [3], and simulated annealing [4]. Some techniques from evolutionary computation, such as the genetic algorithms (GAs) [5], [6] are under studying in the last few years. The research of Koza and his collaborators on analog circuit synthesis by genetic programming (GP) is likely the most successful evolutionary computation-based approach so far [7], [8], [9]. Unlike previous systems, the component values, the number of components and the circuit topologies are evolved simultaneously. The genetic programming system begins with minimal knowledge of analog circuit design and generates circuits using a cellular encoding technique and circuit-constructing program trees [10].

Owning to the challenge of analog circuit synthesis, it has been performed traditionally by experts who have a wealth of experience and intuition. By far, much progression has been made in automating analog circuit synthesis [11], [12], [13]. However, due to the complexity of the problem, the evolving size is larger, and the evaluation time is longer consequently. It will affect the efficiency of the generation of the good circuits.

In this paper, we propose a two-layer evolutionary scheme to evolve the analog circuits. This scheme is a marriage of a divide-and-conquer approach [14] and genetic programming. Section 2 gives a general overview of the GP. Section 3 concentrates on how the two-layer GP is applied to create common analog circuits, especially on how to select component values and topology sizes for a given circuit topology. Section 4 describes two specific applications of the two-layer GP scheme with the results and the analyses of them. Conclusions and plans for the future work are given in Section 5.

Section snippets

Genetic programming overview

Genetic programming, concerned with artificial intelligence, is based on the ideas of Darwinian evolution and genetics [15], [16]. As a branch of evolutionary computation (EC), the genetic programming is a method to automatically search for computer programs that perform a specific task. While GA uses a string of numbers to represent the solution, GP creates computer programs with a tree structure.

Genetic programming generates the solutions by executing the following three steps:

  • (1)

    Random

Basic ideas of the two-layer GP

Based on the common GP, we employ a divide-and-conquer approach to make the circuit divided into two layers before evolving, and name this new method Two-layer GP. In this way, we can make sure that, while the size of the evolvable circuit and its population become larger, the actual evolving size of the circuit’s representation and the evolutionary computation will increase to a lower extent compared to the original method. The two-layer GP contains two major properties as follows.

Experimental results

This section is about the application of two-layer GP for the solution of several practical analog circuit applications. At the beginning of each evolution, a basic embryonic circuit is given as the primitive individual of the evolvable circuit. The embryonic circuit is given due to the original function of the circuit. As mentioned above, the fitness function involved here is f(g, s, p), s and p can be synchronously obtained by simulation. Our evolution environment is PIV 2.3 G, EMS memory 1 GB

Conclusions and future work

In this paper, we propose a two-layer evolutionary scheme based on genetic programming (GP), which uses a divide-and-conquer approach to evolve the analog circuit. We have shown that a two-layer circuit representation and evolution strategy based on two-layer evolutionary scheme can automatically produce circuits in two applications. Detailed simulations of the evolved designs suggest that the performances of the circuits are electrically well-behaved and thus are suitable for physical

Acknowledgments

This work is supported by the National Natural Science Key Foundation of China with the Grant No. 60133010, the National Research Foundation for the Doctoral Program of Higher Education of China with the Grant No. 20030486049, the Research Project of Science and Technology of Education Department of Jiangxi Province with the Grant No. Gan-Jiao-Ji-Zi[2005]150 and the Key Laboratory of High-Performance Computing Technology of Jiangxi Province with the Grand No. JXHC-2005-003.

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