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Applied Reconfigurable Computing

12th International Symposium, ARC 2016 Mangaratiba, RJ, Brazil, March 22–24, 2016 Proceedings

  • Conference proceedings
  • © 2016

Overview

Editors:
  1. Vanderlei Bonato

    1. University of Sao Paulo, São Carlos, Brazil

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  2. Christos Bouganis

    1. Imperial College London, London, United Kingdom

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  3. Marek Gorgon

    1. AGH University of Science and Technology, Krakow, Poland

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Part of the book series: Lecture Notes in Computer Science (LNCS, volume 9625)

Part of the book sub series: Theoretical Computer Science and General Issues (LNTCS)

Included in the following conference series:

Conference proceedings info: ARC 2016.

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Table of contents (31 papers)

  1. Front Matter

    Pages I-XIV
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  2. Invited Talks

    1. Front Matter

      Pages 1-1
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    2. The VINEYARD Approach: Versatile, Integrated, Accelerator-Based, Heterogeneous Data Centres

      • Christoforos Kachris, Dimitrios Soudris, Georgi Gaydadjiev, Huy-Nam Nguyen, Dimitrios S. Nikolopoulos, Angelos Bilas et al.
      Pages 3-13

    3. A Design Methodology for the Next Generation Real-Time Vision Processors

      • Jones Yudi Mori, André Werner, Arij Shallufa, Florian Fricke, Michael Hübner
      Pages 14-25

    4. EEG Feature Extraction Accelerator Enabling Long Term Epilepsy Monitoring Based on Ultra Low Power WSNs

      • Evangelinos Mariatos, Christos P. Antonopoulos, Nikolaos S. Voros
      Pages 26-37

  3. Video and Image Processing

    1. Front Matter

      Pages 39-39
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    2. Computing to the Limit with Heterogeneous CPU-FPGA Devices in a Video Fusion Application

      • Jose Nunez-Yanez
      Pages 41-53

    3. An Efficient Hardware Architecture for Block Based Image Processing Algorithms

      • Tomasz Kryjak, Marek Gorgon, Mateusz Komorkiewicz
      Pages 54-65

    4. An FPGA Stereo Matching Processor Based on the Sum of Hamming Distances

      • Abiel Aguilar-González, Miguel Arias-Estrada
      Pages 66-77

    5. FPGA Soft-Core Processors, Compiler and Hardware Optimizations Validated Using HOG

      • Colm Kelly, Fahad Manzoor Siddiqui, Burak Bardak, Yun Wu, Roger Woods, Karren Rafferty
      Pages 78-90

    6. A Comparison of Machine Learning Classifiers for FPGA Implementation of HOG-Based Human Detection

      • Masahito Oishi, Yoshiki Hayashida, Ryo Fujita, Yuichiro Shibata, Kiyoshi Oguri
      Pages 91-104

    7. A Scalable Dataflow Accelerator for Real Time Onboard Hyperspectral Image Classification

      • Shaojun Wang, Xinyu Niu, Ning Ma, Wayne Luk, Philip Leong, Yu Peng
      Pages 105-116

  4. Fault-Tolerant Systems

    1. Front Matter

      Pages 117-117
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    2. A Redundant Design Approach with Diversity of FPGA Resource Mapping

      • Yudai Shirakura, Taisei Segawa, Yuichiro Shibata, Kenichi Morimoto, Masaharu Tanaka, Masanori Nobe et al.
      Pages 119-131

    3. Method to Analyze the Susceptibility of HLS Designs in SRAM-Based FPGAs Under Soft Errors

      • Jorge Tonfat, Lucas Tambara, André Santos, Fernanda Kastensmidt
      Pages 132-143

    4. Low Cost Dynamic Scrubbing for Real-Time Systems

      • Leonardo P. Santos, Gabriel L. Nazar, Luigi Carro
      Pages 144-156

  5. Tools and Architectures

    1. Front Matter

      Pages 157-157
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    2. Analytical Delay Model for CPU-FPGA Data Paths in Programmable System-on-Chip FPGA

      • Mohammad Tahghighi, Sharad Sinha, Wei Zhang
      Pages 159-170

    3. New Partitioning Approach for Hardware Trojan Detection Using Side-Channel Measurements

      • Karim M. Abdellatif, Christian Cornesse, Jacques Fournier, Bruno Robisson
      Pages 171-182

    4. A Comprehensive Set of Schemes for PUF Response Generation

      • Bilal Habib, Kris Gaj
      Pages 183-194
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  1. Applied Reconfigurable Computing

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About this book

This book constitutes the refereed proceedings of the 12th International Symposium on Applied Reconfigurable Computing, ARC 2016, held in Rio de Janeiro, Brazil, in March 2016.

The 20 full papers presented in this volume were carefully reviewed and selected from 47 submissions. They are organized in topical headings named: video and image processing; fault-tolerant systems; tools and architectures; signal processing; and multicore systems.

In addition, the book contains 3 invited papers and 8 poster papers on funded RD running and completed projects.

Editors and Affiliations

  • University of Sao Paulo, São Carlos, Brazil

    Vanderlei Bonato

  • Imperial College London, London, United Kingdom

    Christos Bouganis

  • AGH University of Science and Technology, Krakow, Poland

    Marek Gorgon

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