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Automatic Machine Code Generation for a Transport Triggered Architecture using Cartesian Genetic Programming

Automatic Machine Code Generation for a Transport Triggered Architecture using Cartesian Genetic Programming

James Alfred Walker, Yang Liu, Gianluca Tempesti, Jon Timmis, Andy M. Tyrrell
Copyright: © 2012 |Volume: 3 |Issue: 4 |Pages: 19
ISSN: 1947-9220|EISSN: 1947-9239|EISBN13: 9781466610521|DOI: 10.4018/jaras.2012100103
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MLA

Walker, James Alfred, et al. "Automatic Machine Code Generation for a Transport Triggered Architecture using Cartesian Genetic Programming." IJARAS vol.3, no.4 2012: pp.32-50. http://doi.org/10.4018/jaras.2012100103

APA

Walker, J. A., Liu, Y., Tempesti, G., Timmis, J., & Tyrrell, A. M. (2012). Automatic Machine Code Generation for a Transport Triggered Architecture using Cartesian Genetic Programming. International Journal of Adaptive, Resilient and Autonomic Systems (IJARAS), 3(4), 32-50. http://doi.org/10.4018/jaras.2012100103

Chicago

Walker, James Alfred, et al. "Automatic Machine Code Generation for a Transport Triggered Architecture using Cartesian Genetic Programming," International Journal of Adaptive, Resilient and Autonomic Systems (IJARAS) 3, no.4: 32-50. http://doi.org/10.4018/jaras.2012100103

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Abstract

Transport triggered architectures are used for implementing bio-inspired systems due to their simplicity, modularity and fault-tolerance. However, producing efficient, optimised machine code for such architectures is extremely difficult, since computational complexity has moved from the hardware-level to the software-level. Presented is the application of Cartesian Genetic Programming (CGP) to the evolution of machine code for a simple implementation of transport triggered architecture. The effectiveness of the algorithm is demonstrated by evolving machine code for a 4-bit multiplier with three different levels of parallelism. The results show that 100% successful solutions were found by CGP and by further optimising the size of the solutions, it’s possible to find efficient implementations of the 4-bit multiplier. Further analysis of the solutions showed that use of loops within the CGP function set could be beneficial and was demonstrated by repeating the earlier 4-bit multiplier experiment with the addition of a loop function.

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