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Field Programmable Logic and Applications

9th International Workshops, FPL'99, Glasgow, UK, August 30 - September 1, 1999, Proceedings

  • Conference proceedings
  • © 1999

Overview

Editors:
  1. Patrick Lysaght

    1. Xilinx Research Labs, San Jose

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    You can also search for this editor in PubMed   Google Scholar

  2. James Irvine

    1. Department of Electrical and Electronic Engineering, University of Strathclyde, Glasgow, UK

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    You can also search for this editor in PubMed   Google Scholar

  3. Reiner Hartenstein

    1. Technical University of Kaiserslautern, Germany

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Part of the book series: Lecture Notes in Computer Science (LNCS, volume 1673)

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Table of contents (65 papers)

  1. Front Matter

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  2. Signal Processing

    1. Reconfigurable Processors for High-Performance, Embedded Digital Signal Processing

      • Paul Graham, Brent Nelson
      Pages 1-10

    2. Auditory Signal Processing in Hardware

      • M. Brucke, A. Schulz, W. Nebel
      Pages 11-20

    3. SONIC – A Plug-In Architecture for Video Processing

      • Simon D. Haynes, Peter Y. K. Cheung, Wayne Luk, John Stone
      Pages 21-30

  4. Optimization Studies

    1. Optimal Finite Field Multipliers for FPGAs

      • Gregory C. Ahlquist, Brent Nelson, Michael Rice
      Pages 51-60

    2. Memory Access Optimization and RAM Inference for Pipeline Vectorization

      • Markus Weinhardt, Wayne Luk
      Pages 61-70

    3. Analysis and Optimization of 3-D FPGA Design Parameters

      • Silviu M. S. A. Chiricescu, M. Michael Vai
      Pages 71-80

  5. Physical Design

    1. Tabu Search: Ultra-Fast Placement for FPGAs

      • John M. Emmert, Dinesh K. Bhatia
      Pages 81-90

    2. Placement Optimization Based on Global Routing Updating for System Partitioning onto Multi-FPGA Mesh Topologies

      • Juan de Vicente, Juan Lanchares, Román Hermida
      Pages 91-100

    3. Hierarchical Interactive Approach to Partition Large Designs into FPGAs

      • Helena Krupnova, Gabriele Saucier
      Pages 101-110

    4. Logical-to-Physical Memory Mapping for FPGAs with Dual-Port Embedded Arrays

      • William K. C. Ho, Steven J. E. Wilton
      Pages 111-123

  6. Dynamically Reconfigurable Logic

    1. DYNASTY: A Temporal Floorplanning Based CAD Framework for Dynamically Reconfigurable Logic Systems

      • Milan Vasilko
      Pages 124-133

    2. A Bipartitioning Algorithm for Dynamic Reconfigurable Programmable Logic

      • E. Cantó, J. M. Moreno, J. Cabestany, J. Faura, J. M. Insenser
      Pages 134-143

    3. Self Controlling Dynamic Reconfiguration: A Case Study

      • Gordon McGregor, Patrick Lysaght
      Pages 144-154

  7. Design Tools

    1. An Internet Based Development Framework for Reconfigurable Computing

      • Reiner W. Hartenstein, Michael Herz, Ulrich Nageldinger, Thomas Hoffmann
      Pages 155-164

    2. On Tool Integration in High-Performance FPGA Design Flows

      • Andreas Koch
      Pages 165-174

    3. Hardware-Software Codesign for Dynamically Reconfigurable Architectures

      • Karam S. Chatha, Ranga Vemuri
      Pages 175-184

  8. Reconfigurable Computing

    1. Serial Hardware Libraries for Reconfigurable Designs

      • W. Luk, A. Derbyshire, S. Guo, D. Siganos
      Pages 185-194
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Keywords

About this book

This book contains the papers presented at the 9th International Workshop on Field ProgrammableLogic and Applications (FPL’99), hosted by the University of Strathclyde in Glasgow, Scotland, August 30 – September 1, 1999. FPL’99 is the ninth in the series of annual FPL workshops. The FPL’99 programme committee has been fortunate to have received a large number of high-quality papers addressing a wide range of topics. From these, 33 papers have been selected for presentation at the workshop and a further 32 papers have been accepted for the poster sessions. A total of 65 papers from 20 countries are included in this volume. FPL is a subject area that attracts researchers from both electronic engine- ing and computer science. Whether we are engaged in research into soft ha- ware or hard software seems to be primarily a question of perspective. What is unquestionable is that the interaction of groups of researchers from di?erent backgrounds results in stimulating and productive research. As we prepare for the new millennium, the premier European forum for - searchers in ?eld programmable logic remains the FPL workshop. Next year the FPL series of workshopswill celebrate its tenth anniversary.The contribution of so many overseas researchers has been a particularly attractive feature of these events, giving them a truly international perspective, while the informal and convivial atmosphere that pervades the workshops have been their hallmark. We look forward to preserving these features in the future while continuing to expand the size and quality of the events.

Editors and Affiliations

  • Xilinx Research Labs, San Jose

    Patrick Lysaght

  • Department of Electrical and Electronic Engineering, University of Strathclyde, Glasgow, UK

    James Irvine

  • Technical University of Kaiserslautern, Germany

    Reiner Hartenstein

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