keywords = "genetic algorithms, genetic programming, SBSE, Real
world applications: Poster",
pages = "225--226",
month = "12-16 " # jul,
organisation = "SIGEVO",
address = "Dublin, Ireland",
DOI = "doi:10.1145/2001858.2001985",
publisher = "ACM",
publisher_address = "New York, NY, USA",
abstract = "The incessant progress in manufacturing technology is
posing new challenges to microprocessor designers.
Nowadays, comprehensive verification of a chip can only
be performed after tape-out, when the first silicon
prototypes are available. Several activities that were
originally supposed to be part of the pre-silicon
design phase are migrating to this post-silicon time as
well. The short paper describes a post-silicon
methodology that can be exploited to devise functional
failing tests. Such tests are essential to analyse and
debug speed paths during verification, speed-stepping,
and other critical activities. The proposed methodology
is based on the Genetic Programming paradigm, and
exploits a versatile toolkit named muGP. The paper
demonstrates that an evolutionary algorithm can
successfully tackle a significant and still open
industrial problem. Moreover, it shows how to take into
account complex hardware characteristics and
architectural details of such complex devices.",
notes = "Also known as \cite{2001985} Distributed on CD-ROM at
GECCO-2011.