abstract = "Design verification is a crucial step in the design of
any electronic device. Particularly when microprocessor
cores are considered, devising appropriate test cases
may be a difficult task. This paper presents a
methodology able to automatically induce a test program
for maximising a given verification metric. The
methodology is based on an evolutionary paradigm and
exploits a syntactical description of microprocessor
assembly language and an RT-level functional model.
Experimental results show the effectiveness of the
approach.",