Applying Genetic Parallel Programming to Synthesize Combinational Logic Circuits

Created by W.Langdon from gp-bibliography.bib Revision:1.8051

@Article{Cheang:2007:tec,

• author = "Sin Man Cheang and Kin Hong Lee and Kwong Sak Leung",
• title = "Applying Genetic Parallel Programming to Synthesize Combinational Logic Circuits",
• journal = "IEEE Transactions on Evolutionary Computation",
• year = "2007",
• volume = "11",
• number = "4",
• pages = "503--520",
• month = aug,
• keywords = "genetic algorithms, genetic programming, FPGA, Circuit design, digital circuits, evolvable hardware, parallel programming",
• ISSN = "1389-2576",
• DOI = "doi:10.1109/TEVC.2006.884044",
• size = "18 pages",
• abstract = "Experimental results show that parallel programs can be evolved more easily than sequential programs in genetic parallel programming (GPP). GPP is a novel genetic programming paradigm which evolves parallel program solutions. With the rapid development of lookup-table-based (LUT-based) field programmable gate arrays (FPGAs), traditional circuit design and optimisation techniques cannot fully exploit the LUTs in LUT-based FPGAs. Based on the GPP paradigm, we have developed a combinational logic circuit learning system, called GPP logic circuit synthesiser (GPPLCS), in which a multilogic-unit processor is used to evaluate LUT circuits. To show the effectiveness of the GPPLCS, we have performed a series of experiments to evolve combinational logic circuits with two- and four-input LUTs. In this paper, we present eleven multi-output Boolean problems and their evolved circuits. The results show that the GPPLCS can evolve more compact four-input LUT circuits than the well-known LUT-based FPGA synthesis algorithms.",

}

Genetic Programming entries for Ivan Sin Man Cheang Kin-Hong Lee Kwong-Sak Leung

Citations