- author = "Andreea-Ingrid Cross",
- title = "Reconfigurable computing for advanced trading strategies",
- school = "Department of Computing, Imperial College London",
- year = "2018",
- address = "UK",
- month = mar,
- keywords = "genetic algorithms, genetic programming, FPGA, EHW, PSO, Valgrind,",
-
URL = "
https://spiral.imperial.ac.uk/handle/10044/1/64787",
-
URL = "http://hdl.handle.net/10044/1/64787",
-
URL = "
https://spiral.imperial.ac.uk/bitstream/10044/1/64787/3/Cross-AI-2018-PhD-Thesis.pdf",
-
DOI = "
doi:10.25560/64787",
- size = "196 pages",
-
abstract = "Financial markets are rapidly evolving to exploit
powerful computational and statistical tools to
construct both risk management and alpha strategies.
This research seeks to develop new tools to identify
efficient trading strategies through the use of genetic
programming and some mathematical optimisation methods
such as adaptive elastic net regularisation while
leveraging the powerful hardware acceleration
capabilities of Field Programmable Gate Array
technology.
The first contribution of this thesis represents a Field Programmable Gate Array based algorithmic trading system which supports multiple trading strategies that can be either run in parallel or switched at run-time according to changes in market volatility, for more elaborate trading strategies. Three types of hardware designs are compared: a static reconfiguration, a full reconfiguration, and a partial reconfiguration design. We evaluate our approach using both synthetic and historical market data and we notice that our system can obtain a considerable speedup when compared to its software implementation counterpart.
The second contribution of this thesis presents an evolutionary hybrid genetic program which uses aspects of swarm intelligence to seek reliable and profitable trading patterns to enhance trading strategies. We use Field Programmable Gate Array technology to accelerate the fitness evaluation step, one of the most computationally demanding operations in genetic programming. The proposed design is based on run-time reconfiguration to improve hardware use, being substantially faster than an optimised, multi-threaded software implementation while achieving comparable financial returns.
The third contribution of this thesis represents a Field Programmable Gate Array based custom regularisation and regression solver, CRRS. We also introduce an Adaptive Elastic Net pipelined architecture implemented on Field Programmable Gate Arrays for maximum parallelism performance. We further show how CRRS can provide an efficient, scalable solution, allowing us to handle large-scale datasets that cannot fit the on-board DRAM of a single FPGA. Our solver proves to be efficient in different scenarios. For example, when applied to dimensionality reduction for a portfolio of foreign exchange rates, which uses the efficient kitchen-sink regression approach within the Parametric Portfolio Policies technique.",
-
notes = "Nee Funie?
UBS
Supervisors: Wayne Luk and Mark Salmon",
