Design and implementation of a virtual reconfigurable architecture for different applications of intrinsic evolvable hardware
Created by W.Langdon from
gp-bibliography.bib Revision:1.8051
- @Article{Wang:2008:IETcdt,
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author = "Jin Wang and Qiao Song Chen and Chong Ho Lee",
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title = "Design and implementation of a virtual reconfigurable
architecture for different applications of intrinsic
evolvable hardware",
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journal = "IET Computers Digital Techniques",
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year = "2008",
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month = sep,
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volume = "2",
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number = "5",
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pages = "386--400",
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keywords = "genetic algorithms, genetic programming, Cartesian
genetic programming, Celoxica RC1000 peripheral
component interconnect, Xilinx Virtex xcv2000E FPGA,
character recogniser, field programmable gate arrays,
fitness value calculation unit, function element
network, function level evolution, gate level
evolution, intrinsic evolvable hardware, phenotype
representation, virtual reconfigurable architecture,
field programmable gate arrays, peripheral interfaces,
reconfigurable architectures",
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DOI = "doi:10.1049/iet-cdt:20070124",
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ISSN = "1751-8601",
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abstract = "The authors present a novel virtual reconfigurable
architecture (VRA) for realising real-world
applications of intrinsic evolvable hardware (EHW) on
field programmable gate arrays (FPGAs). The phenotype
representation of the proposed evolvable system is
based on a two-dimensional function element (FE)
network. Compared with the traditional Cartesian
genetic programming, the proposed approach includes
more connection restrictions in the FE network to
reduce genotype length. Another innovative feature of
the VRA is that the whole evolvable system, which
consists of an evolutionary algorithm unit, a fitness
value calculation unit and an FE array unit, can be
realised on a single FPGA. On this work, a custom
Xilinx Virtex xcv2000E FPGA, which is fitted in the
Celoxica RC1000 peripheral component interconnect (PCI)
board is used as the hardware platform. The main motive
of the research is to design a general, flexible
evolvable system with powerful computation ability to
achieve intrinsic evolution. As examples, the proposed
evolvable system is devoted to evolve two real-world
applications: a character recogniser and an image
operator by using gate level evolution and function
level evolution, respectively. The experimental results
show that the VRA can bring higher computational
ability and more flexibility than traditional approach
to intrinsic EHW.",
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notes = "Also known as \cite{4609375}",
- }
Genetic Programming entries for
Jin Wang
Qiao Song Chen
Chong Ho Lee
Citations