Synthesis of Multivalued Logical Networks for FPGA Implementations
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- @InProceedings{Deniziak:2016:DSD,
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author = "Stanislaw Deniziak and Mariusz Wisniewski and
Karol Wieczorek",
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booktitle = "2016 Euromicro Conference on Digital System Design
(DSD)",
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title = "Synthesis of Multivalued Logical Networks for FPGA
Implementations",
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year = "2016",
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pages = "657--660",
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abstract = "This paper presents the method of FPGA-oriented
synthesis of multiple-valued logical networks.
Multiple-valued network consists of modules connected
by multiple-valued signals. During synthesis each
module is decomposed into smaller ones, that may be
implemented using one logic cell. For this purpose the
symbolic decomposition is applied. Since the
decomposition of modules strongly depends on encoding
of multivalued inputs and outputs, the result of
synthesis depends on the order, in which the
consecutive modules are implemented. In our approach we
optimise this order using developmental genetic
programming. Experimental results showed that our
approach significantly reduces the cost of
implementation.",
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keywords = "genetic algorithms, genetic programming",
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DOI = "doi:10.1109/DSD.2016.107",
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month = aug,
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notes = "Also known as \cite{7723614}",
- }
Genetic Programming entries for
Stanislaw Deniziak
Mariusz Wisniewski
Karol Wieczorek
Citations