A methodology for reconfigurable hardware design based upon evolutionary computation

Created by W.Langdon from gp-bibliography.bib Revision:1.8051

@Article{Fernandez:2004:MM,

• author = "Francisco {Fernandez de Vega} and J. I. Hidalgo and J. Lanchares and J. M. Sanchez",
• title = "A methodology for reconfigurable hardware design based upon evolutionary computation",
• journal = "Microprocessors and Microsystems",
• year = "2004",
• volume = "28",
• number = "7",
• pages = "363--371",
• month = sep,
• email = "fcofdez@unex.es",
• keywords = "genetic algorithms, genetic programming, reconfigurable hardware, Field programmable gate arrays, Compact genetic algorithm, Configurable logic blocks",
• ISSN = "0141-9331",
• URL = "http://www.sciencedirect.com/science/article/B6V0X-4C4BWW7-1/2/815fe7c17a6207d7a31f8046e4e2a5d1",
• DOI = "doi:10.1016/j.micpro.2004.03.017",
• size = "9 pages",
• abstract = "We present a methodology for Multi-FPGA systems (MFS) design. MFSs are used for a great variety of applications, including dynamically re-configurable hardware applications, digital circuit emulation, and numerical computation. There are a great variety of boards for MFS implementation. We have employed a set of techniques based on evolutionary algorithms, and we show that they are capable of solving all of the design tasks (partitioning placement and routing). Firstly a hybrid compact genetic algorithm solves the partitioning problem and then genetic programming is used to obtain a solution for the two other tasks.",

}

Genetic Programming entries for Francisco Fernandez de Vega Jose Ignacio Hidalgo Perez J Lanchares Juan Manuel Sanchez Perez

Citations