Resynthesis of logic circuits using machine learning and reconvergent paths
Created by W.Langdon from
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- @InProceedings{Kocnova:2021:DSD,
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author = "Jitka Kocnova and Zdenek Vasicek",
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title = "Resynthesis of logic circuits using machine learning
and reconvergent paths",
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booktitle = "2021 24th Euromicro Conference on Digital System
Design (DSD)",
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year = "2021",
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pages = "69--76",
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address = "Palermo, Italy",
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month = "1-3 " # sep,
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keywords = "genetic algorithms, genetic programming, Cartesian
Genetic Programming, Scalability, Logic circuits,
Machine learning, Logic gates, Benchmark testing,
Tools, Genetics, Logic optimization, Evolutionary
Resynthesis",
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isbn13 = "978-1-6654-2704-3",
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DOI = "doi:10.1109/DSD53832.2021.00020",
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size = "8 pages",
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abstract = "Boolean network scoping represents a common approach
incorporated in conventional synthesis tools for
maintaining good scalability of the synthesis process.
Recently, an approach to the local resynthesis based on
combination of evolutionary optimization with the
principle of Boolean network scoping has been proposed.
Local resynthesis is an iterative process based on the
extraction of smaller sub-circuits from a complex
circuit that are optimized locally and implanted back
to the original circuit. The main advantage of the
local resynthesis is that it can mitigate the problem
of scalability of representation which is typical to
the evolutionary algorithms as the efficiency of the
evolutionary optimization applied at the global level
deteriorates with the increasing circuit complexity.
Unfortunately, the efficiency of local resynthesis
depends on the efficiency of the sub-circuit extraction
process. We propose an alternative method, based on the
reconvergent paths. The evaluation is performed on a
set of highly optimized benchmark problems representing
various real-world controllers, logic and arithmetic
circuits. The method provides better results compared
to the state-of-the-art logic synthesis tool and
evolutionary optimization techniques operating locally
and globally. A substantially higher number of
redundant gates was removed in more than 70percent
cases, while keeping the computational effort at the
same level. A huge improvement was achieved especially
for the controllers. On average, the proposed method
was able to remove more than 14.3percent of gates. The
highest achieved gate reduction was more than 45percent
of gates.",
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notes = "Also known as \cite{9556495}",
- }
Genetic Programming entries for
Jitka Kocnova
Zdenek Vasicek
Citations