Genetic Programming Bibliography entries for Zdenek Vasicek

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GP coauthors/coeditors: Michal Bidlo, Milan Ceska, Jiri Matyas, Vojtech Mrazek, Lukas Sekanina, Tomas Vojnar, Petr Fiser, Jan Schmidt, Radek Hrbacek, Jitka Kocnova, Syed Shakib Sarwar, Kaushik Roy, Vojtech Salajka, Ondrej Ptak, Muhammad Shafique, Rehan Hafiz, Muhammad Usama Javed, Sarmad Abbas, Ladislav Capka, Jim Torresen, Kyrre Harald Glette, Marcus Furuholmen, Karel Slany,

Genetic Programming Articles by Zdenek Vasicek

  1. Vojtech Mrazek and Zdenek Vasicek and Radek Hrbacek. Role of circuit representation in evolutionary design of energy-efficient approximate circuits. IET Computers \& Digital Techniques, 12(4):139-149, 2018. details

  2. Zdenek Vasicek and Vojtech Mrazek. Trading between quality and non-functional properties of median filter in embedded systems. Genetic Programming and Evolvable Machines, 18(1):45-82, 2017. details

  3. Lukas Sekanina and Zdenek Vasicek and Vojtech Mrazek. Approximate Circuits in Low-Power Image and Video Processing: The Approximate Median Filter. Radioengineering, 26(3):623-632, 2017. details

  4. Zdenek Vasicek and Lukas Sekanina. Evolutionary design of complex approximate combinational circuits. Genetic Programming and Evolvable Machines, 17(2):169-192, 2016. details

  5. Zdenek Vasicek and Lukas Sekanina. Evolutionary Approach to Approximate Digital Circuits Design. IEEE Transactions on Evolutionary Computation, 19(3):432-444, 2015. details

  6. Zdenek Vasicek and Lukas Sekanina. Formal verification of candidate solutions for post-synthesis evolutionary optimization in evolvable hardware. Genetic Programming and Evolvable Machines, 12(3):305-327, 2011. Special Issue Title: Evolvable Hardware Challenges. details

Genetic Programming conference papers by Zdenek Vasicek

  1. Zdenek Vasicek and Vojtech Mrazek and Lukas Sekanina. Automated Circuit Approximation Method Driven by Data Distribution. In Juergen Teich and Franco Fummi editors, 2019 Design, Automation Test in Europe Conference Exhibition (DATE), pages 96-101, Florence, 2019. IEEE. details

  2. Jitka Kocnova and Zdenek Vasicek. Impact of subcircuit selection on the efficiency of CGP-based optimization of gate-level circuits. In Richard Allmendinger and Carlos Cotta and Carola Doerr and Pietro S. Oliveto and Thomas Weise and Ales Zamuda and Anne Auger and Dimo Brockhoff and Nikolaus Hansen and Tea Tusar and Konstantinos Varelas and David Camacho-Fernandez and Massimiliano Vasile and Annalisa Riccardi and Bilel Derbel and Ke Li and Xiaodong Li and Saul Zapotecas and Qingfu Zhang and Ozgur Akman and Khulood Alyahya and Juergen Branke and Jonathan Fieldsend and Tinkle Chugh and Jussi Hakanen and Josu Ceberio Uribe and Valentino Santucci and Marco Baioletti and John McCall and Emma Hart and Daniel R. Tauritz and John R. Woodward and Koichi Nakayama and Chika Oshima and Stefan Wagner and Michael Affenzeller and Eneko Osaba and Javier Del Ser and Pascal Kerschke and Boris Naujoks and Vanessa Volz and Anna I Esparcia-Alcazar and Riyad Alshammari and Erik Hemberg and Tokunbo Makanju and Brad Alexander and Saemundur O. Haraldsson and Markus Wagner and Silvino Fernandez Alzueta and Pablo Valledor Pellicer and Thomas Stuetzle and David Walker and Matt Johns and Nick Ross and Ed Keedwell and Masaya Nakata and Anthony Stein and Takato Tatsumi and Nadarajen Veerapen and Arnaud Liefooghe and Sebastien Verel and Gabriela Ochoa and Stephen Smith and Stefano Cagnoni and Robert M. Patton and William La Cava and Randal Olson and Patryk Orzechowski and Ryan Urbanowicz and Akira Oyama and Koji Shimoyama and Hemant Kumar Singh and Kazuhisa Chiba and Pramudita Satria Palar and Alma Rahat and Richard Everson and Handing Wang and Yaochu Jin and Marcus Gallagher and Mike Preuss and Olivier Teytaud and Fernando Lezama and Joao Soares and Zita Vale editors, GECCO '19: Proceedings of the Genetic and Evolutionary Computation Conference Companion, pages 377-378, Prague, Czech Republic, 2019. ACM. details

  3. Jitka Kocnova and Zdenek Vasicek. Towards a Scalable EA-based Optimization of Digital Circuits. In Lukas Sekanina and Ting Hu and Nuno Lourenco editors, EuroGP 2019: Proceedings of the 22nd European Conference on Genetic Programming, volume 11451, pages 81-97, Leipzig, Germany, 2019. Springer Verlag. details

  4. Milan Ceska and Jiri Matyas and Vojtech Mrazek and Lukas Sekanina and Zdenek Vasicek and Tomas Vojnar. ADAC: Automated Design of Approximate Circuits. In Hana Chockler and Georg Weissenbacher editors, Computer Aided Verification, volume 10981, pages 612-620, Oxford, 2018. Springer. details

  5. Vojtech Mrazek and Zdenek Vasicek. Parallel Optimization of Transistor Level Circuits Using Cartesian Genetic Programming. In Proceedings of the Genetic and Evolutionary Computation Conference Companion, pages 1849-1856, Berlin, Germany, 2017. ACM. details

  6. Milan Ceska and Jiri Matyas and Vojtech Mrazek and Lukas Sekanina and Zdenek Vasicek and Tomas Vojnar. Approximating Complex Arithmetic Circuits with Formal Error Guarantees: 32-bit Multipliers Accomplished. In Iris Bahar and Sri Parameswaran editors, Proceedings of 36th IEEE/ACM International Conference On Computer Aided Design (ICCAD), pages 416-423, Irvine, CA, USA, 2017. Institute of Electrical and Electronics Engineers. details

  7. Muhammad Shafique and Rehan Hafiz and Muhammad Usama Javed and Sarmad Abbas and Lukas Sekanina and Zdenek Vasicek and Vojtech Mrazek. Adaptive and Energy-Efficient Architectures for Machine Learning: Challenges, Opportunities, and Research Roadmap. In 2017 IEEE Computer Society Annual Symposium on VLSI (ISVLSI), pages 627-632, Bochum, Germany, 2017. IEEE. details

  8. Zdenek Vasicek and Vojtech Mrazek and Lukas Sekanina. Towards low power approximate DCT architecture for HEVC standard. In Design, Automation Test in Europe Conference Exhibition (DATE), 2017, pages 1576-1581, Lausanne, Switzerland, 2017. IEEE. details

  9. Vojtech Mrazek and Radek Hrbacek and Zdenek Vasicek and Lukas Sekanina. EvoApproxSb: Library of approximate adders and multipliers for circuit design and benchmarking of approximation methods. In Design, Automation Test in Europe Conference Exhibition (DATE), 2017, pages 258-261, Lausanne, Switzerland, 2017. IEEE. details

  10. Z. Vasicek and V. Mrazek and L. Sekanina. Evolutionary functional approximation of circuits implemented into FPGAs. In 2016 IEEE Symposium Series on Computational Intelligence (SSCI), 2016. details

  11. Zdenek Vasicek and Lukas Sekanina. Search-Based Synthesis of Approximate Circuits Implemented into FPGAs. In Jason Anderson and Philip Brisk editors, 26th International Conference on Field-Programmable Logic and Applications, Lausanne, Switzerland, 2016. IEEE. details

  12. Lukas Sekanina and Zdenek Vasicek. Genetic Improvement for Approximate Computing. In George Karakonstantis and Costas Bekas and Dimitris Gizopoulos and Nikolaos Bellas editors, 2nd Workshop On Approximate Computing (WAPCO 2016), Prague, 2016. details

  13. Vojtech Mrazek and Zdenek Vasicek. Automatic Design of Arbitrary-Size Approximate Sorting Networks with Error Guarantee. In Ricardo Reis and Aida Todri-Sanial editors, International Workshop on Power And Timing Modeling, Optimization and Simulation, pages 221-228, Bremen, Germany, 2016. IEEE. details

  14. Vojtech Mrazek and Syed Shakib Sarwar and Lukas Sekanina and Zdenek Vasicek and Kaushik Roy. Design of Power-efficient Approximate Multipliers for Approximate Artificial Neural Networks. In Proceedings of the 35th International Conference on Computer-Aided Design, pages 81:1-81:7, Austin, Texas, USA, 2016. ACM. details

  15. Radek Hrbacek and Vojtech Mrazek and Zdenek Vasicek. Automatic design of approximate circuits by means of multi-objective evolutionary algorithms. In 2016 International Conference on Design and Technology of Integrated Systems in Nanoscale Era (DTIS), 2016. details

  16. Zdenek Vasicek and Lukas Sekanina. Evolutionary Approximation of Complex Digital Circuits. In Sara Silva and Anna I Esparcia-Alcazar and Manuel Lopez-Ibanez and Sanaz Mostaghim and Jon Timmis and Christine Zarges and Luis Correia and Terence Soule and Mario Giacobini and Ryan Urbanowicz and Youhei Akimoto and Tobias Glasmachers and Francisco Fernandez de Vega and Amy Hoover and Pedro Larranaga and Marta Soto and Carlos Cotta and Francisco B. Pereira and Julia Handl and Jan Koutnik and Antonio Gaspar-Cunha and Heike Trautmann and Jean-Baptiste Mouret and Sebastian Risi and Ernesto Costa and Oliver Schuetze and Krzysztof Krawiec and Alberto Moraglio and Julian F. Miller and Pawel Widera and Stefano Cagnoni and JJ Merelo and Emma Hart and Leonardo Trujillo and Marouane Kessentini and Gabriela Ochoa and Francisco Chicano and Carola Doerr editors, GECCO Companion '15: Proceedings of the Companion Publication of the 2015 Annual Conference on Genetic and Evolutionary Computation, pages 1505-1506, Madrid, Spain, 2015. ACM. details

  17. Zdenek Vasicek. Cartesian GP in Optimization of Combinational Circuits with Hundreds of Inputs and Thousands of Gates. In Penousal Machado and Malcolm I. Heywood and James McDermott and Mauro Castelli and Pablo Garcia-Sanchez and Paolo Burelli and Sebastian Risi and Kevin Sim editors, 18th European Conference on Genetic Programming, volume 9025, pages 139-150, Copenhagen, 2015. Springer. best paper award at EuroGP 2015. details

  18. Zdenek Vasicek and Lukas Sekanina. Circuit Approximation Using Single and Multi-Objective Cartesian GP. In Penousal Machado and Malcolm I. Heywood and James McDermott and Mauro Castelli and Pablo Garcia-Sanchez and Paolo Burelli and Sebastian Risi and Kevin Sim editors, 18th European Conference on Genetic Programming, volume 9025, pages 217-229, Copenhagen, 2015. Springer. details

  19. Lukas Sekanina and Zdenek Vasicek. Evolutionary Computing in Approximate Circuit Design and Optimization. In Nikolaos Bellas and Georgios Karakonstantis and Costas Bekas editors, 1st Workshop On Approximate Computing, WAPCO 2015, Amsterdam, Holland, 2015. details

  20. Vojtech Mrazek and Zdenek Vasicek and Lukas Sekanina. Evolutionary Approximation of Software for Embedded Systems: Median Function. In William B. Langdon and Justyna Petke and David R. White editors, Genetic Improvement 2015 Workshop, pages 795-801, Madrid, 2015. ACM. details

  21. Vojtech Mrazek and Zdenek Vasicek. Evolutionary Design of Transistor Level Digital Circuits using Discrete Simulation. In Penousal Machado and Malcolm I. Heywood and James McDermott and Mauro Castelli and Pablo Garcia-Sanchez and Paolo Burelli and Sebastian Risi and Kevin Sim editors, 18th European Conference on Genetic Programming, volume 9025, pages 66-77, Copenhagen, 2015. Springer. details

  22. Zdenek Vasicek and Michal Bidlo. On Evolution of Multi-Category Pattern Classifiers Suitable for Embedded Systems. In Miguel Nicolau and Krzysztof Krawiec and Malcolm I. Heywood and Mauro Castelli and Pablo Garcia-Sanchez and Juan J. Merelo and Victor M. Rivas Santos and Kevin Sim editors, 17th European Conference on Genetic Programming, volume 8599, pages 234-245, Granada, Spain, 2014. Springer. details

  23. Zdenek Vasicek and Lukas Sekanina. Evolutionary design of approximate multipliers under different error metrics. In 17th International Symposium on Design and Diagnostics of Electronic Circuits Systems, pages 135-140, 2014. details

  24. Zdenek Vasicek and Lukas Sekanina. How to evolve complex combinational circuits from scratch?. In 2014 IEEE International Conference on Evolvable Systems, pages 133-140, Orlando, FL, USA, 2014. IEEE. details

  25. Vojtech Mrazek and Zdenek Vasicek. Acceleration of transistor-level evolution using Xilinx Zynq Platform. In 2014 IEEE International Conference on Evolvable Systems, pages 9-16, Orlando, FL, USA, 2014. IEEE. details

  26. Lukas Sekanina and Ondrej Ptak and Zdenek Vasicek. Cartesian Genetic Programming as Local Optimizer of Logic Networks. In Carlos A. Coello Coello editor, Proceedings of the 2014 IEEE Congress on Evolutionary Computation, pages 2901-2908, Beijing, China, 2014. details

  27. Lukas Sekanina and Zdenek Vasicek. Approximate circuit design by means of evolvable hardware. In IEEE International Conference on Evolvable Systems (ICES 2013), pages 21-28, 2013. details

  28. Michal Bidlo and Zdenek Vasicek. Evolution of Cellular Automata with Conditionally Matching Rules. In Luis Gerardo de la Fraga editor, 2013 IEEE Conference on Evolutionary Computation, volume 1, pages 1178-1185, Cancun, Mexico, 2013. details

  29. Zdenek Vasicek and Karel Slany. Efficient Phenotype Evaluation in Cartesian Genetic Programming. In Alberto Moraglio and Sara Silva and Krzysztof Krawiec and Penousal Machado and Carlos Cotta editors, Proceedings of the 15th European Conference on Genetic Programming, EuroGP 2012, volume 7244, pages 266-278, Malaga, Spain, 2012. Springer Verlag. details

  30. Zdenek Vasicek and Lukas Sekanina. On Area Minimization of Complex Combinational Circuits Using Cartesian Genetic Programming. In Xiaodong Li editor, Proceedings of the 2012 IEEE Congress on Evolutionary Computation, pages 825-832, Brisbane, Australia, 2012. details

  31. Lukas Sekanina and Zdenek Vasicek. A SAT-based fitness function for evolutionary optimization of polymorphic circuits. In Design, Automation Test in Europe Conference Exhibition (DATE), 2012, pages 715-720, 2012. details

  32. Lukas Sekanina and Vojtech Salajka and Zdenek Vasicek. Two-Step Evolution of Polymorphic Circuits for Image Multi-Filtering. In Xiaodong Li editor, Proceedings of the 2012 IEEE Congress on Evolutionary Computation, pages 1481-1488, Brisbane, Australia, 2012. details

  33. Zdenek Vasicek and Michal Bidlo. Evolutionary Design of Robust Noise-Specific Image Filters. In Alice E. Smith editor, Proceedings of the 2011 IEEE Congress on Evolutionary Computation, pages 269-276, New Orleans, USA, 2011. IEEE Press. details

  34. Zdenek Vasicek and Lukas Sekanina. A global postsynthesis optimization method for combinational circuits. In Lothar Thiele editor, Design, Automation Test in Europe Conference Exhibition (DATE), 2011, pages 1525-1528, Grenoble, France, 2011. IEEE. details

  35. Zdenek Vasicek and Michal Bidlo and Lukas Sekanina and Kyrre Glette. Evolutionary design of efficient and robust switching image filters. In 2011 NASA/ESA Conference on Adaptive Hardware and Systems (AHS), pages 192-199, San Diego, USA, 2011. details

  36. Petr Fiser and Jan Schmidt and Zdenek Vasicek and Lukas Sekanina. On logic synthesis of conventionally hard to synthesize circuits using genetic programming. In 13th IEEE International Symposium on Design and Diagnostics of Electronic Circuits and Systems (DDECS), 2010, pages 346-351, 2010. details

  37. Zdenek Vasicek and Michal Bidlo and Lukas Sekanina and Jim Torresen and Kyrre Glette and Marcus Furuholmen. Evolution of Impulse Bursts Noise Filters. In NASA/ESA Conference on Adaptive Hardware and Systems, AHS 2009, pages 27-34, 2009. details

  38. Zdenek Vasicek and Lukas Sekanina. Hardware Accelerators for Cartesian Genetic Programming. In Michael O'Neill and Leonardo Vanneschi and Steven Gustafson and Anna Isabel Esparcia Alcazar and Ivanoe De Falco and Antonio Della Cioppa and Ernesto Tarantino editors, Proceedings of the 11th European Conference on Genetic Programming, EuroGP 2008, volume 4971, pages 230-241, Naples, 2008. Springer. details

  39. Zdenek Vasicek and Ladislav Capka and Lukas Sekanina. Analysis of Reconfiguration Options for a Reconfigurable Polymorphic Circuit. In NASA/ESA Conference on Adaptive Hardware and Systems, AHS '08, pages 3-10, 2008. details

Genetic Programming book chapters by Zdenek Vasicek

  1. Lukas Sekanina and Zdenek Vasicek and Vojtech Mrazek. Automated Search-Based Functional Approximation for Digital Circuits. In Sherief Reda and Muhammad Shafique editors, Approximate Circuits Methodologies and CAD, pages 175-203. Springer, 2019. details

  2. Zdenek Vasicek. Bridging the Gap Between Evolvable Hardware and Industry Using Cartesian Genetic Programming. In Susan Stepney and Andrew Adamatzky editors, Inspired by Nature: Essays Presented to Julian F. Miller on the Occasion of his 60th Birthday, volume 28 of Emergence, Complexity and Computation, chapter 2, pages 39-55. Springer, 2017. details

  3. Lukas Sekanina and Zdenek Vasicek. Functional Equivalence Checking for Evolution of Complex Digital Circuits. In Martin A. Trefzer and Andy M. Tyrrell editors, Evolvable Hardware From Practice to Application, chapter 6, pages 175-189. Springer, 2015. details

  4. Lukas Sekanina and Zdenek Vasicek. CGP Acceleration Using Field-Programmable Gate Arrays. In Julian F. Miller editor, Cartesian Genetic Programming, chapter 7, pages 217-230. Springer, 2011. details