Genetic Programming Bibliography entries for Zdenek Vasicek

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GP coauthors/coeditors: Michal Bidlo, Milan Ceska, Jiri Matyas, Vojtech Mrazek, Lukas Sekanina, Tomas Vojnar, Petr Fiser, Jan Schmidt, David Hodan, Radek Hrbacek, Roman Tobias Kalkreuth, Leo Francoso Dal Piccol Sotto, Jakub Husa, Diederick Vermetten, Furong Ye, Thomas Back, Jitka Kocnova, Syed Shakib Sarwar, Kaushik Roy, Gisele L Pappa, Mario Giacobini, Vojtech Salajka, Ondrej Ptak, Muhammad Shafique, Rehan Hafiz, Muhammad Usama Javed, Sarmad Abbas, Ladislav Capka, Jim Torresen, Kyrre Harald Glette, Marcus Furuholmen, Karel Slany,

Genetic Programming Articles by Zdenek Vasicek

  1. Milan Ceska and Jiri Matyas and Vojtech Mrazek and Lukas Sekanina and Zdenek Vasicek and Tomas Vojnar. SagTree: Towards efficient mutation in evolutionary circuit approximation. Swarm and Evolutionary Computation, 69:100986, 2022. details

  2. David Hodan and Vojtech Mrazek and Zdenek Vasicek. Semantically‑oriented mutation operator in cartesian genetic programming for evolutionary circuit design. Genetic Programming and Evolvable Machines, 22(4):539-572, 2021. Special Issue: Highlights of Genetic Programming 2020 Events. details

  3. Vojtech Mrazek and Lukas Sekanina and Zdenek Vasicek. Libraries of Approximate Circuits: Automated Design and Application in CNN Accelerators. IEEE Journal on Emerging and Selected Topics in Circuits and Systems, 10(4):406-418, 2020. details

  4. Jitka Kocnova and Zdenek Vasicek. EA-based resynthesis: an efficient tool for optimization of digital circuits. Genetic Programming and Evolvable Machines, 21(3):287-319, 2020. Special Issue: Highlights of Genetic Programming 2019 Events. details

  5. Milan Ceska and Jiri Matyas and Vojtech Mrazek and Lukas Sekanina and Zdenek Vasicek and Tomas Vojnar. Adaptive verifiability-driven strategy for evolutionary approximation of arithmetic circuits. Applied Soft Computing, 95:106466, 2020. details

  6. Vojtech Mrazek and Zdenek Vasicek and Radek Hrbacek. Role of circuit representation in evolutionary design of energy-efficient approximate circuits. IET Computers \& Digital Techniques, 12(4):139-149, 2018. details

  7. Zdenek Vasicek and Vojtech Mrazek. Trading between quality and non-functional properties of median filter in embedded systems. Genetic Programming and Evolvable Machines, 18(1):45-82, 2017. details

  8. Lukas Sekanina and Zdenek Vasicek and Vojtech Mrazek. Approximate Circuits in Low-Power Image and Video Processing: The Approximate Median Filter. Radioengineering, 26(3):623-632, 2017. details

  9. Zdenek Vasicek and Lukas Sekanina. Evolutionary design of complex approximate combinational circuits. Genetic Programming and Evolvable Machines, 17(2):169-192, 2016. details

  10. Zdenek Vasicek and Lukas Sekanina. Evolutionary Approach to Approximate Digital Circuits Design. IEEE Transactions on Evolutionary Computation, 19(3):432-444, 2015. details

  11. Zdenek Vasicek and Lukas Sekanina. Formal verification of candidate solutions for post-synthesis evolutionary optimization in evolvable hardware. Genetic Programming and Evolvable Machines, 12(3):305-327, 2011. Special Issue Title: Evolvable Hardware Challenges. details

Genetic Programming Conference proceedings edited by Zdenek Vasicek

Genetic Programming conference papers by Zdenek Vasicek

  1. Zdenek Vasicek. Automated Synthesis of Commutative Approximate Arithmetic Operators. In Bing Xue editor, 2024 IEEE Congress on Evolutionary Computation (CEC), Yokohama, Japan, 2024. IEEE. details

  2. Roman Kalkreuth and Zdenek Vasicek and Jakub Husa and Diederick Vermetten and Furong Ye and Thomas Baeck. Towards a General Boolean Function Benchmark Suite. In Sara Silva and Luis Paquete and Leonardo Vanneschi and Nuno Lourenco and Ales Zamuda and Ahmed Kheiri and Arnaud Liefooghe and Bing Xue and Ying Bi and Nelishia Pillay and Irene Moser and Arthur Guijt and Jessica Catarino and Pablo Garcia-Sanchez and Leonardo Trujillo and Carla Silva and Nadarajen Veerapen editors, Proceedings of the 2023 Genetic and Evolutionary Computation Conference, pages 591-594, Lisbon, Portugal, 2023. Association for Computing Machinery. details

  3. Roman Kalkreuth and Leo Francoso Dal Piccol Sotto and Zdenek Vasicek. Graph-based genetic programming. In Jonathan E. Fieldsend and Markus Wagner editors, GECCO '22: Genetic and Evolutionary Computation Conference, Companion Volume, Boston, Massachusetts, USA, July 9 - 13, 2022, pages 958-982, 2022. ACM. details

  4. Jitka Kocnova and Zdenek Vasicek. Resynthesis of logic circuits using machine learning and reconvergent paths. In 2021 24th Euromicro Conference on Digital System Design (DSD), pages 69-76, Palermo, Italy, 2021. details

  5. Vojtech Mrazek and Lukas Sekanina and Zdenek Vasicek. Using Libraries of Approximate Circuits in Design of Hardware Accelerators of Deep Neural Networks. In 2020 2nd IEEE International Conference on Artificial Intelligence Circuits and Systems (AICAS), pages 243-247, 2020. details

  6. David Hodan and Vojtech Mrazek and Zdenek Vasicek. Semantically-Oriented Mutation Operator in Cartesian Genetic Programming for Evolutionary Circuit Design. In Carlos Artemio Coello Coello and Arturo Hernandez Aguirre and Josu Ceberio Uribe and Mario Garza Fabre and Gregorio Toscano Pulido and Katya Rodriguez-Vazquez and Elizabeth Wanner and Nadarajen Veerapen and Efren Mezura Montes and Richard Allmendinger and Hugo Terashima Marin and Markus Wagner and Thomas Bartz-Beielstein and Bogdan Filipic and Heike Trautmann and Ke Tang and John Koza and Erik Goodman and William B. Langdon and Miguel Nicolau and Christine Zarges and Vanessa Volz and Tea Tusar and Boris Naujoks and Peter A. N. Bosman and Darrell Whitley and Christine Solnon and Marde Helbig and Stephane Doncieux and Dennis G. Wilson and Francisco Fernandez de Vega and Luis Paquete and Francisco Chicano and Bing Xue and Jaume Bacardit and Sanaz Mostaghim and Jonathan Fieldsend and Oliver Schuetze and Dirk Arnold and Gabriela Ochoa and Carlos Segura and Carlos Cotta and Michael Emmerich and Mengjie Zhang and Robin Purshouse and Tapabrata Ray and Justyna Petke and Fuyuki Ishikawa and Johannes Lengler and Frank Neumann editors, Proceedings of the 2020 Genetic and Evolutionary Computation Conference, pages 940-948, internet, 2020. Association for Computing Machinery. details

  7. Zdenek Vasicek and Vojtech Mrazek and Lukas Sekanina. Automated Circuit Approximation Method Driven by Data Distribution. In Juergen Teich and Franco Fummi editors, 2019 Design, Automation Test in Europe Conference Exhibition (DATE), pages 96-101, Florence, 2019. IEEE. details

  8. Jitka Kocnova and Zdenek Vasicek. Impact of subcircuit selection on the efficiency of CGP-based optimization of gate-level circuits. In Richard Allmendinger and Carlos Cotta and Carola Doerr and Pietro S. Oliveto and Thomas Weise and Ales Zamuda and Anne Auger and Dimo Brockhoff and Nikolaus Hansen and Tea Tusar and Konstantinos Varelas and David Camacho-Fernandez and Massimiliano Vasile and Annalisa Riccardi and Bilel Derbel and Ke Li and Xiaodong Li and Saul Zapotecas and Qingfu Zhang and Ozgur Akman and Khulood Alyahya and Juergen Branke and Jonathan Fieldsend and Tinkle Chugh and Jussi Hakanen and Josu Ceberio Uribe and Valentino Santucci and Marco Baioletti and John McCall and Emma Hart and Daniel R. Tauritz and John R. Woodward and Koichi Nakayama and Chika Oshima and Stefan Wagner and Michael Affenzeller and Eneko Osaba and Javier Del Ser and Pascal Kerschke and Boris Naujoks and Vanessa Volz and Anna I Esparcia-Alcazar and Riyad Alshammari and Erik Hemberg and Tokunbo Makanju and Brad Alexander and Saemundur O. Haraldsson and Markus Wagner and Silvino Fernandez Alzueta and Pablo Valledor Pellicer and Thomas Stuetzle and David Walker and Matt Johns and Nick Ross and Ed Keedwell and Masaya Nakata and Anthony Stein and Takato Tatsumi and Nadarajen Veerapen and Arnaud Liefooghe and Sebastien Verel and Gabriela Ochoa and Stephen Smith and Stefano Cagnoni and Robert M. Patton and William La Cava and Randal Olson and Patryk Orzechowski and Ryan Urbanowicz and Akira Oyama and Koji Shimoyama and Hemant Kumar Singh and Kazuhisa Chiba and Pramudita Satria Palar and Alma Rahat and Richard Everson and Handing Wang and Yaochu Jin and Marcus Gallagher and Mike Preuss and Olivier Teytaud and Fernando Lezama and Joao Soares and Zita Vale editors, GECCO '19: Proceedings of the Genetic and Evolutionary Computation Conference Companion, pages 377-378, Prague, Czech Republic, 2019. ACM. details

  9. Jitka Kocnova and Zdenek Vasicek. Towards a Scalable EA-based Optimization of Digital Circuits. In Lukas Sekanina and Ting Hu and Nuno Lourenco editors, EuroGP 2019: Proceedings of the 22nd European Conference on Genetic Programming, volume 11451, pages 81-97, Leipzig, Germany, 2019. Springer Verlag. details

  10. Milan Ceska and Jiri Matyas and Vojtech Mrazek and Lukas Sekanina and Zdenek Vasicek and Tomas Vojnar. ADAC: Automated Design of Approximate Circuits. In Hana Chockler and Georg Weissenbacher editors, Computer Aided Verification, volume 10981, pages 612-620, Oxford, 2018. Springer. details

  11. Vojtech Mrazek and Zdenek Vasicek. Parallel Optimization of Transistor Level Circuits Using Cartesian Genetic Programming. In Proceedings of the Genetic and Evolutionary Computation Conference Companion, pages 1849-1856, Berlin, Germany, 2017. ACM. details

  12. Milan Ceska and Jiri Matyas and Vojtech Mrazek and Lukas Sekanina and Zdenek Vasicek and Tomas Vojnar. Approximating Complex Arithmetic Circuits with Formal Error Guarantees: 32-bit Multipliers Accomplished. In Iris Bahar and Sri Parameswaran editors, Proceedings of 36th IEEE/ACM International Conference On Computer Aided Design (ICCAD), pages 416-423, Irvine, CA, USA, 2017. Institute of Electrical and Electronics Engineers. details

  13. Muhammad Shafique and Rehan Hafiz and Muhammad Usama Javed and Sarmad Abbas and Lukas Sekanina and Zdenek Vasicek and Vojtech Mrazek. Adaptive and Energy-Efficient Architectures for Machine Learning: Challenges, Opportunities, and Research Roadmap. In 2017 IEEE Computer Society Annual Symposium on VLSI (ISVLSI), pages 627-632, Bochum, Germany, 2017. IEEE. details

  14. Zdenek Vasicek and Vojtech Mrazek and Lukas Sekanina. Towards low power approximate DCT architecture for HEVC standard. In Design, Automation Test in Europe Conference Exhibition (DATE), 2017, pages 1576-1581, Lausanne, Switzerland, 2017. IEEE. details

  15. Vojtech Mrazek and Radek Hrbacek and Zdenek Vasicek and Lukas Sekanina. EvoApprox8b: Library of Approximate Adders and Multipliers for Circuit Design and Benchmarking of Approximation Methods. In Design, Automation Test in Europe Conference Exhibition (DATE), 2017, pages 258-261, Lausanne, Switzerland, 2017. IEEE. details

  16. Z. Vasicek and V. Mrazek and L. Sekanina. Evolutionary functional approximation of circuits implemented into FPGAs. In 2016 IEEE Symposium Series on Computational Intelligence (SSCI), 2016. details

  17. Zdenek Vasicek and Lukas Sekanina. Search-Based Synthesis of Approximate Circuits Implemented into FPGAs. In Jason Anderson and Philip Brisk editors, 26th International Conference on Field-Programmable Logic and Applications, Lausanne, Switzerland, 2016. IEEE. details

  18. Lukas Sekanina and Zdenek Vasicek. Genetic Improvement for Approximate Computing. In George Karakonstantis and Costas Bekas and Dimitris Gizopoulos and Nikolaos Bellas editors, 2nd Workshop On Approximate Computing (WAPCO 2016), Prague, 2016. details

  19. Vojtech Mrazek and Zdenek Vasicek. Automatic Design of Arbitrary-Size Approximate Sorting Networks with Error Guarantee. In Ricardo Reis and Aida Todri-Sanial editors, International Workshop on Power And Timing Modeling, Optimization and Simulation, pages 221-228, Bremen, Germany, 2016. IEEE. details

  20. Vojtech Mrazek and Syed Shakib Sarwar and Lukas Sekanina and Zdenek Vasicek and Kaushik Roy. Design of Power-efficient Approximate Multipliers for Approximate Artificial Neural Networks. In Proceedings of the 35th International Conference on Computer-Aided Design, pages 81:1-81:7, Austin, Texas, USA, 2016. ACM. details

  21. Radek Hrbacek and Vojtech Mrazek and Zdenek Vasicek. Automatic design of approximate circuits by means of multi-objective evolutionary algorithms. In 2016 International Conference on Design and Technology of Integrated Systems in Nanoscale Era (DTIS), pages 239-244, Istanbul Sehir University, 2016. details

  22. Zdenek Vasicek and Lukas Sekanina. Evolutionary Approximation of Complex Digital Circuits. In Sara Silva and Anna I Esparcia-Alcazar and Manuel Lopez-Ibanez and Sanaz Mostaghim and Jon Timmis and Christine Zarges and Luis Correia and Terence Soule and Mario Giacobini and Ryan Urbanowicz and Youhei Akimoto and Tobias Glasmachers and Francisco Fernandez de Vega and Amy Hoover and Pedro Larranaga and Marta Soto and Carlos Cotta and Francisco B. Pereira and Julia Handl and Jan Koutnik and Antonio Gaspar-Cunha and Heike Trautmann and Jean-Baptiste Mouret and Sebastian Risi and Ernesto Costa and Oliver Schuetze and Krzysztof Krawiec and Alberto Moraglio and Julian F. Miller and Pawel Widera and Stefano Cagnoni and JJ Merelo and Emma Hart and Leonardo Trujillo and Marouane Kessentini and Gabriela Ochoa and Francisco Chicano and Carola Doerr editors, GECCO Companion '15: Proceedings of the Companion Publication of the 2015 Annual Conference on Genetic and Evolutionary Computation, pages 1505-1506, Madrid, Spain, 2015. ACM. details

  23. Zdenek Vasicek. Cartesian GP in Optimization of Combinational Circuits with Hundreds of Inputs and Thousands of Gates. In Penousal Machado and Malcolm I. Heywood and James McDermott and Mauro Castelli and Pablo Garcia-Sanchez and Paolo Burelli and Sebastian Risi and Kevin Sim editors, 18th European Conference on Genetic Programming, volume 9025, pages 139-150, Copenhagen, 2015. Springer. best paper award at EuroGP 2015. details

  24. Zdenek Vasicek and Lukas Sekanina. Circuit Approximation Using Single and Multi-Objective Cartesian GP. In Penousal Machado and Malcolm I. Heywood and James McDermott and Mauro Castelli and Pablo Garcia-Sanchez and Paolo Burelli and Sebastian Risi and Kevin Sim editors, 18th European Conference on Genetic Programming, volume 9025, pages 217-229, Copenhagen, 2015. Springer. details

  25. Lukas Sekanina and Zdenek Vasicek. Evolutionary Computing in Approximate Circuit Design and Optimization. In Nikolaos Bellas and Georgios Karakonstantis and Costas Bekas editors, 1st Workshop On Approximate Computing, WAPCO 2015, Amsterdam, Holland, 2015. details

  26. Vojtech Mrazek and Zdenek Vasicek and Lukas Sekanina. Evolutionary Approximation of Software for Embedded Systems: Median Function. In William B. Langdon and Justyna Petke and David R. White editors, Genetic Improvement 2015 Workshop, pages 795-801, Madrid, 2015. ACM. details

  27. Vojtech Mrazek and Zdenek Vasicek. Evolutionary Design of Transistor Level Digital Circuits using Discrete Simulation. In Penousal Machado and Malcolm I. Heywood and James McDermott and Mauro Castelli and Pablo Garcia-Sanchez and Paolo Burelli and Sebastian Risi and Kevin Sim editors, 18th European Conference on Genetic Programming, volume 9025, pages 66-77, Copenhagen, 2015. Springer. details

  28. Zdenek Vasicek and Michal Bidlo. On Evolution of Multi-Category Pattern Classifiers Suitable for Embedded Systems. In Miguel Nicolau and Krzysztof Krawiec and Malcolm I. Heywood and Mauro Castelli and Pablo Garcia-Sanchez and Juan J. Merelo and Victor M. Rivas Santos and Kevin Sim editors, 17th European Conference on Genetic Programming, volume 8599, pages 234-245, Granada, Spain, 2014. Springer. details

  29. Zdenek Vasicek and Lukas Sekanina. Evolutionary design of approximate multipliers under different error metrics. In 17th International Symposium on Design and Diagnostics of Electronic Circuits Systems, pages 135-140, 2014. details

  30. Zdenek Vasicek and Lukas Sekanina. How to evolve complex combinational circuits from scratch?. In 2014 IEEE International Conference on Evolvable Systems, pages 133-140, Orlando, FL, USA, 2014. IEEE. details

  31. Vojtech Mrazek and Zdenek Vasicek. Acceleration of transistor-level evolution using Xilinx Zynq Platform. In 2014 IEEE International Conference on Evolvable Systems, pages 9-16, Orlando, FL, USA, 2014. IEEE. details

  32. Lukas Sekanina and Ondrej Ptak and Zdenek Vasicek. Cartesian Genetic Programming as Local Optimizer of Logic Networks. In Carlos A. Coello Coello editor, Proceedings of the 2014 IEEE Congress on Evolutionary Computation, pages 2901-2908, Beijing, China, 2014. details

  33. Lukas Sekanina and Zdenek Vasicek. Approximate circuit design by means of evolvable hardware. In IEEE International Conference on Evolvable Systems (ICES 2013), pages 21-28, 2013. details

  34. Michal Bidlo and Zdenek Vasicek. Evolution of Cellular Automata with Conditionally Matching Rules. In Luis Gerardo de la Fraga editor, 2013 IEEE Conference on Evolutionary Computation, volume 1, pages 1178-1185, Cancun, Mexico, 2013. details

  35. Zdenek Vasicek and Karel Slany. Efficient Phenotype Evaluation in Cartesian Genetic Programming. In Alberto Moraglio and Sara Silva and Krzysztof Krawiec and Penousal Machado and Carlos Cotta editors, Proceedings of the 15th European Conference on Genetic Programming, EuroGP 2012, volume 7244, pages 266-278, Malaga, Spain, 2012. Springer Verlag. details

  36. Zdenek Vasicek and Lukas Sekanina. On Area Minimization of Complex Combinational Circuits Using Cartesian Genetic Programming. In Xiaodong Li editor, Proceedings of the 2012 IEEE Congress on Evolutionary Computation, pages 825-832, Brisbane, Australia, 2012. details

  37. Lukas Sekanina and Zdenek Vasicek. A SAT-based fitness function for evolutionary optimization of polymorphic circuits. In Design, Automation Test in Europe Conference Exhibition (DATE), 2012, pages 715-720, 2012. details

  38. Lukas Sekanina and Vojtech Salajka and Zdenek Vasicek. Two-Step Evolution of Polymorphic Circuits for Image Multi-Filtering. In Xiaodong Li editor, Proceedings of the 2012 IEEE Congress on Evolutionary Computation, pages 1481-1488, Brisbane, Australia, 2012. details

  39. Zdenek Vasicek and Michal Bidlo. Evolutionary Design of Robust Noise-Specific Image Filters. In Alice E. Smith editor, Proceedings of the 2011 IEEE Congress on Evolutionary Computation, pages 269-276, New Orleans, USA, 2011. IEEE Press. details

  40. Zdenek Vasicek and Lukas Sekanina. A global postsynthesis optimization method for combinational circuits. In Lothar Thiele editor, Design, Automation Test in Europe Conference Exhibition (DATE), 2011, pages 1525-1528, Grenoble, France, 2011. IEEE. details

  41. Zdenek Vasicek and Michal Bidlo and Lukas Sekanina and Kyrre Glette. Evolutionary design of efficient and robust switching image filters. In 2011 NASA/ESA Conference on Adaptive Hardware and Systems (AHS), pages 192-199, San Diego, USA, 2011. details

  42. Petr Fiser and Jan Schmidt and Zdenek Vasicek and Lukas Sekanina. On logic synthesis of conventionally hard to synthesize circuits using genetic programming. In 13th IEEE International Symposium on Design and Diagnostics of Electronic Circuits and Systems (DDECS), 2010, pages 346-351, 2010. details

  43. Zdenek Vasicek and Michal Bidlo and Lukas Sekanina and Jim Torresen and Kyrre Glette and Marcus Furuholmen. Evolution of Impulse Bursts Noise Filters. In NASA/ESA Conference on Adaptive Hardware and Systems, AHS 2009, pages 27-34, 2009. details

  44. Zdenek Vasicek and Lukas Sekanina. Hardware Accelerators for Cartesian Genetic Programming. In Michael O'Neill and Leonardo Vanneschi and Steven Gustafson and Anna Isabel Esparcia Alcazar and Ivanoe De Falco and Antonio Della Cioppa and Ernesto Tarantino editors, Proceedings of the 11th European Conference on Genetic Programming, EuroGP 2008, volume 4971, pages 230-241, Naples, 2008. Springer. details

  45. Zdenek Vasicek and Ladislav Capka and Lukas Sekanina. Analysis of Reconfiguration Options for a Reconfigurable Polymorphic Circuit. In NASA/ESA Conference on Adaptive Hardware and Systems, AHS '08, pages 3-10, 2008. details

Genetic Programming book chapters by Zdenek Vasicek

  1. Lukas Sekanina and Zdenek Vasicek and Vojtech Mrazek. Automated Search-Based Functional Approximation for Digital Circuits. In Sherief Reda and Muhammad Shafique editors, Approximate Circuits Methodologies and CAD, pages 175-203. Springer, 2019. details

  2. Zdenek Vasicek. Bridging the Gap Between Evolvable Hardware and Industry Using Cartesian Genetic Programming. In Susan Stepney and Andrew Adamatzky editors, Inspired by Nature: Essays Presented to Julian F. Miller on the Occasion of his 60th Birthday, volume 28 of Emergence, Complexity and Computation, chapter 2, pages 39-55. Springer, 2017. details

  3. Lukas Sekanina and Zdenek Vasicek. Functional Equivalence Checking for Evolution of Complex Digital Circuits. In Martin A. Trefzer and Andy M. Tyrrell editors, Evolvable Hardware From Practice to Application, chapter 6, pages 175-189. Springer, 2015. details

  4. Lukas Sekanina and Zdenek Vasicek. CGP Acceleration Using Field-Programmable Gate Arrays. In Julian F. Miller editor, Cartesian Genetic Programming, chapter 7, pages 217-230. Springer, 2011. details