- title = "Cartesian Genetic Programming as Local Optimizer of Logic Networks",
- author = "Lukas Sekanina and Ondrej Ptak and Zdenek Vasicek",
- pages = "2901--2908",
- booktitle = "Proceedings of the 2014 IEEE Congress on Evolutionary Computation",
- year = "2014",
- month = "6-11 " # jul,
- editor = "Carlos A. {Coello Coello}",
- address = "Beijing, China",
- keywords = "genetic algorithms, genetic programming, Cartesian genetic programming, Hardware Aspects of Bio-Inspired Architectures and Systems (HABIAS)",
- ISBN = "0-7803-8515-2",
-
URL = "
https://www.fit.vut.cz/research/publication-file/10504/localres_final.pdf",
-
URL = "
https://www.fit.vut.cz/research/publication/10504",
-
DOI = "
doi:10.1109/CEC.2014.6900326",
- size = "8 pages",
- abstract = "Logic synthesis and optimisation methods work either globally on the whole logic network or locally on preselected sub-networks. Evolutionary design methods have already been applied to evolve and optimise logic circuits at the global level. In this paper, we propose a new method based on Cartesian genetic programming (CGP) as a local area optimiser in combinational logic networks. First, a subcircuit is extracted from a complex circuit, then the subcircuit is optimised by CGP and finally the optimised subcircuit replaces the original one. The procedure is repeated until a termination criterion is satisfied. We present a performance comparison of local and global evolutionary optimisation methods with a conventional approach based on ABC and analyse these methods using differently pre-optimised benchmark circuits. If a sufficient time is available, the proposed locally optimising CGP gives better results than other locally operating methods reported in the literature; however, its performance is significantly worse than the evolutionary global optimisation.",
-
notes = "Brno University of Technology, Faculty of Information
Technology, IT4Innovations Centre of
ExcellenceBozetechova 2, 61266 Brno, Czech
Republic
Also known as \cite{FITPUB10504}
WCCI2014",
