Evolutionary Approach to Approximate Digital Circuits Design

Created by W.Langdon from gp-bibliography.bib Revision:1.8051

@Article{Vasicek:2014:ieeeTEC,

• author = "Zdenek Vasicek and Lukas Sekanina",
• title = "Evolutionary Approach to Approximate Digital Circuits Design",
• journal = "IEEE Transactions on Evolutionary Computation",
• year = "2015",
• volume = "19",
• number = "3",
• pages = "432--444",
• month = jun,
• keywords = "genetic algorithms, genetic programming, Cartesian Genetic Programming, Approximate Computing, Digital circuits, Population Seeding",
• ISSN = "1089-778X",
• DOI = "doi:10.1109/TEVC.2014.2336175",
• size = "13 pages",
• abstract = "In approximate computing, the requirement of perfect functional behaved can be relaxed because some applications are inherently error resilient. Approximate circuits, which fall into the approximate computing paradigm, are designed in such a way that they do not fully implement the logic behavior given by the specification and hence their accuracy can be exchanged for lower area, delay or power consumption. In order to automate the design process, we propose to evolve approximate digital circuits which show a minimal error for a supplied amount of resources. The design process which is based on Cartesian Genetic Programming (CGP) can be repeated many times in order to obtain various tradeoffs between the accuracy and area. A heuristic seeding mechanism is introduced to CGP which allows for improving not only the quality of evolved circuits, but also reducing the time of evolution. The efficiency of the proposed method is evaluated for the gate as well as the functional level evolution. In particular, approximate multipliers and median circuits which show very good parameters in comparison with other available implementations were constructed by means of the proposed method.",
• notes = "also known as \cite{6848841}",

}

Genetic Programming entries for Zdenek Vasicek Lukas Sekanina

Citations