A Comparison of Evolvable Hardware Architectures for Classification Tasks

Created by W.Langdon from gp-bibliography.bib Revision:1.8051

@InProceedings{gl-to-08,

• author = "Kyrre Glette and Jim Torresen and Paul Kaufmann and Marco Platzner",
• title = "A Comparison of Evolvable Hardware Architectures for Classification Tasks",
• booktitle = "8th International Conference on Evolvable Systems: From Biology to Hardware: ICES 2008",
• year = "2008",
• editor = "Gregory S. Hornby and Lukas Sekanina and Pauline C. Haddow",
• volume = "5216",
• series = "LNCS",
• pages = "22--33",
• address = "Prague, Czech Republic",
• month = sep # " 21-24",
• publisher = "Springer",
• keywords = "genetic algorithms, genetic programming",
• isbn13 = "978-3-540-85857-7",
• DOI = "doi:10.1007/978-3-540-85857-7_3",
• size = "12 pages",
• abstract = "We analyse and compare four different evolvable hardware approaches for classification tasks: An approach based on a programmable logic array architecture, an approach based on two-phase incremental evolution, a generic logic architecture with automatic definition of building blocks, and a specialized coarse-grained architecture with pre-defined building blocks. We base the comparison on a common data set and report on classification accuracy and training effort. The results show that classification accuracy can be increased by using modular, specialized classifier architectures. Furthermore, function level evolution, either with predefined functions derived from domain-specific knowledge or with functions that are automatically defined during evolution, also gives higher accuracy. Incremental and function level evolution reduce the search space and thus shortens the training effort.",

}

Genetic Programming entries for Kyrre Harald Glette Jim Torresen Paul Kaufmann Marco Platzner

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