- author = "Nam Ho and Abdullah Fathi Ahmed and Paul Kaufmann and Marco Platzner",
- title = "Microarchitectural Optimization by Means of Reconfigurable and Evolvable Cache Mappings",
- booktitle = "2015 NASA/ESA Conference on Adaptive Hardware and Systems (AHS)",
- year = "2015",
- editor = "Giovanni Beltrame",
- address = "Montreal, Quebec, Canada",
- month = "15-18 " # jun,
- publisher = "IEEE",
- keywords = "genetic algorithms, genetic programming, genetic improvement, Cartesian Genetic Programming, EHW",
- isbn13 = "978-1-4673-7502-3",
-
DOI = "
doi:10.1109/AHS.2015.7231178",
- size = "7 pages",
- abstract = "Physical limits are pushing chip manufacturer towards multi- and many-core architectures to maintain the progress of computing power. This trend has also emphasized reconfigurable computing, which enables for even higher parallelization degrees. Reconfigurable computing is often used together with a conventional processor to accelerate highly specific applications. However, exploiting dynamically reconfigurable systems for microarchitectural optimization is a novel research area. This paper presents for the first time an FPGA-based implementation of a processor that can reconfigure and adapt its own memory-to-cache address mapping function at runtime by means of dynamic reconfiguration and nature-inspired optimization. In experiments we can achieve up to 7.8percent better execution times compared to a processor with a conventional cache mapping function.",
-
notes = "http://www.polymtl.ca/ahs2015/en/conference/index.php
LEON3, Virtex 6 FPGA, EvoCache. SHA, QSORT, DUKSTRA and FFT MiBench workloads.
Also known as \cite{7231178}
Phd thesis 2018 doi:10.17619/UNIPB/1-376 FPGA-based Reconfigurable Cache Mapping Schemes: Design and Optimization",
