abstract = "A new class of FPGA-based accelerators is presented
for Cartesian Genetic Programming (CGP). The
accelerators contain a genetic engine which is reused
in all applications. Candidate programs (circuits) are
evaluated using application-specific virtual
reconfigurable circuit (VRC) and fitness unit. Two
types of VRCs are proposed. The first one is devoted
for symbolic regression problems over the fixed point
representation. The second one is designed for
evolution of logic circuits. In both cases a
significant speedup of evolution (30 to 40 times) was
obtained in comparison with a highly optimised software
implementation of CGP. This speedup can be increased by
creating multiple fitness units.",
notes = "Faculty of Information Technology, Brno University of
Technology, Czech Republic